Chip development now takes a leap forward with Synopsys' launch of AI-powered generative design software, Synopsys.ai Copilot.
Synopsys, a leading electronic design automation (EDA) provider, has taken a significant leap forward in technology integration, announcing the expansion of its portfolio with AI-powered tools.
The company's latest offering, Synopsys.ai Copilot, includes Assistive and Creative tools designed to streamline command execution and tool flows, potentially reducing execution times. This development is part of Synopsys' broader strategy to embed generative AI capabilities across its EDA offerings.
In a move to strengthen its AI footprint, Synopsys has acquired Ansys, a leading simulation and modelling company. This acquisition has led to the enhancement of Ansys' SimAI, a domain-independent simulation tool, to work seamlessly with Ansys optiSLang for faster dataset creation and AI training.
Synopsys' AI-enhanced tools have already made a significant impact, with hundreds or thousands of chips designed using these tools. Early access customers are reporting reduced design cycles, with a major contract chip designer validating 10 design components in just 10 days using Synopsys.ai Copilot Creative tools.
Workflow Assistance, another new feature, is designed to speed up repetitive scripting and automation tasks, potentially reducing time-to-solution by an average of two times.
Synopsys is also collaborating with Microsoft on AgentEngineer, a multi-agent AI system intended to eventually take over the entire development of microchips. The project is being built on Microsoft's Discovery platform and was recently demonstrated at DAC 2025.
AgentEngineer aims to gradually assume control of engineering flows, starting from simple automated tasks (L2) and progressing to adaptive flow control (L4) and autonomous decision-making (L5).
While AI is capable of accelerating the implementation phase of chip design by quickly scanning the design space and identifying optimal parameters, human engineers will continue to define architectures and microarchitectures. AI serves as a support tool, narrowing down complex trade-offs and presenting refined options based on its training.
Synopsys offers an extensive EDA toolset covering every stage of chip development, including IP verification (VSO.ai), analog verification (ASO.ai), RTL synthesis, floor planning, place and route (DSO.ai), 3D integration (3DSO.ai), and final functional verification (TSO.ai).
In addition, Synopsys has data analytics tools such as Design.da, Fab.da, and Silicon.da. The company's Knowledge Assistance feature provides real-time access to technical documentation, tool guidance, and expert content directly within the Synopsys environment, improving onboarding speed for junior engineers by 30%.
It's important to note that while AI can help architects choose the best setup for a given workload more efficiently, it does not eliminate them from final decision-making. AI tools such as Synopsys.ai Copilot can generate RTL code and formal assertions, potentially reducing design and verification time, but with imperfections: 80% syntax accuracy and 70% functional accuracy.
When working alongside experienced architects, AI serves as a support tool, narrowing down complex trade-offs and presenting refined options based on its training. As the integration of AI continues to evolve, it's clear that Synopsys is at the forefront of this technological revolution.
