Skytech is currently at the forefront in the development and production of fan-out Poly-Silicon PLP technology components
Skytech, a leading provider of semiconductor equipment, is set to make a significant shift in its technology offerings. The company plans to phase out the current CoWoS technology used in packaging Nvidia Corp's AI chips and replace it with the promising PLP (CoPoS) technology.
This transition is expected to yield substantial benefits, as the PLP technology is capable of producing approximately 2.25 times more AI chips compared to the current technology. The shift to panel-level substrates in the PLP technology aims to address constraints on usable areas and capacity, making it a more efficient solution for chip packaging.
Skytech's semiconductor equipment currently accounts for about 50 percent of its total revenue, with the other half coming from chip equipment components. The company is expanding its semiconductor inspection segment, supplying tools for EUV lithography as part of its growth strategy.
In the first quarter of next year, Skytech plans to introduce an upgraded version of its EUV pellicle inspection equipment. If development goes smoothly, Skytech could become the second supplier of EUV pellicle inspection tools in the world, following NTT Advanced Technology from Japan, who allegedly also expects to enter the market under the same circumstances.
However, Skytech's net profit for the first half of the year fell about 62 percent due to foreign exchange losses. Despite this setback, the company aims to grow its bottom line for the full year of this year, and revenue is expected to rise due to robust demand from chip packagers and testers.
Skytech's major customers include TSMC and ASE Technology Holding Co., both of which use EUV tools for producing 3 or 4-nanometer chips. With these partnerships in place and the introduction of innovative technologies like the PLP, Skytech is poised to continue its significant role in the semiconductor industry.
